Microdevices, such as integrated microcircuits and microelectromechanical systems (MEMS), are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating microdevices typically involves many steps, known as a “design flow.” The particular steps of a design flow often are dependent upon the type of microcircuit, its complexity, the design team, and the microdevice fabricator or foundry that will manufacture the microcircuit. Typically, software and hardware “tools” verify the design at various stages of the design flow by running software simulators and/or hardware emulators, and errors in the design are corrected or the design is otherwise improved.
The “design flow” typically begins by transforming a specification of a new circuit into a logical design, sometimes referred to as a register transfer level (RTL) description of the circuit. With this logical design, the circuit can be described in terms of both the exchange of signals between hardware registers and the logical operations that can be performed on those signals. The logical design typically employs a Hardware Design Language (HDL), such as the Very high speed integrated circuit Hardware Design Language (VHDL). Due to the time and effort it takes to create and verify original HDL code for a new circuit, many developers utilize design building blocks, often referred to as design IP (Intellectual Property), which can describe a component or other electrical subsystem that may be incorporated into the logical design. These developers often generate their logical design by introducing instances of different design IP into the logical design and then interconnecting them to implement the functionality in the specification of the new circuit.
Since most design IP comes from third-party vendors, these developers typically evaluate the design IP through a series of tests to ensure that the design IP implements its intended functionality prior to utilizing the design IP in the logical design. For example, when design IP implements a Peripheral Component Interconnect (PCI) communication system, the series of tests can verify that the design IP implements a PCI protocol accurately. Although this design IP verification strategy can help developers can find flaws in the intended functionality of design IP, it often fails to uncover illegal operations or unintended functionality that the design IP may implement.